PowerPC
A cheat sheet for the PowerPC instruction set if you're working on the Gamecube. I presume this should work the same if you're working on Xbox or PowerMac.
What is PowerPC? A RISC instruction set. Gamecube uses the PowerPC Gekko CPU. Specifically a modified version of the PowerPC 750CXe. Uses 32-bit words.
Registers
Remember that 1 hex digit represents 4 bits.
32 general purpose 32-bit registers.
32 floating point 64-bit registers.
IBAT0-7
DBAT0-7
SR0-SR15
GQR0-GQR7
HID0-HID4
TB, PC, LR, CTR,CR, XER, FPSCR, MSR, SSR0-1, Exceptions, Int Mask, Int Cause, DSISR, DAR, Hash Mask
Instructions
A quick reference. Currently incomplete.
Instructions
add
add r0, r0, r3
Also a variant: add. r24, r0, r4
addi
addi r4, r3, 4192
3883 1060
Addi (into this destination), (from this destination), (this integer constant)
Addis
Addis (into this register), (from this register) plus (offset)
The following code adds an offset of 0x0011 0000 to the address or contents contained in GPR 6 and loads the result into GPR 7:
//Assume GPR 6 contains 0x0000 4000.
addis 7,6,0x0011
//GPR 7 now contains 0x0011 4000.
beq-
beq- ->0x8003D5F8
bge-
branch if greater than
bne-
bne- ->0x8003E388
40820014
branch if not equal
b
b ->0x8003D5EC
"Branch". Starts executing code at label.
bctr
bctr
4e800420
bdnz
bdnz+ ->0x8003D280
bl
bl ->0x802B74FC
48279629
Branch and link. Saves return address in link register, then jumps to func. Used to call subroutines. Be sure to save the link register to the stack first! (see stack example at right)
blr
blr
"Branch to Link Register". Jumps to lr. Used to end a subroutine.
blt
blt- ->0x8003CBAC
blt+ ->0x8003CB78
cmpw
cmpw r6, r0
Compare Word. Checks to see if 2 registers are equal to the same 32 bit value.
cmpwi
cmpwi r6, 0
Compare Word Immediate. Checks to see if a register holds a specific HALFWORD. (Any value between -0x8000 and 0x7FFF)
cmplwi
cmplwi r0, 255
Compare Logical Word Immediate. Checks to see if a register holds a value up to "65535" (0xFFFF in hex).
cmpli
cntlzw
cntlzw r0, r15
crclr
crclr 6, 6
extsb
extsb r0, r0
fmr
fmr f1, f31
fcmpu
fcmpu cr0, f30, f27
fc1ed800
fdivs
fdivs f1, f0, f20
ec20a024
fmuls
fmuls f1, f1, f0
fneg
fneg f0, f25
fc00c850
fsubs
fsubs f1, f0, f2
ec201028
lbz
lbz r0, 0x00F3 (r3)
lbzx
lbzx r4, r18, r3
lfd
lfd f0, 0x0108 (sp)
c801 0108
lfs
lfs f3, 0x001C (r7)
c067 001c
lfsx
lfsx f0, r4, r0
7c04042e
lhz
lhz r0, 0x0004 (r17)
li
li r6, 0
38c00000
lis
lis r5, 0x4330
3c a0 4330
lmw
lmw r19, 0x011C (sp)
ba61011c
lwz
lwz r3, 0x00A0 (r3)
8063 00a0
Load Word Zero. The value stored at the address in Register B is Loaded into Register A. The middle value is a pointer that adds onto the address
lwzu
Load Word Zero Update. The value in Register A will be loaded into whatever Address is in Register B. After the instruction is executed, The address in Register B is updated by the value you specify
lwzx
lwzx r0, r3, r0
7c03002e
mtctr
mtctr r0
7c0903a6
mflr
Move From Link Register
mfspr
Mfspr - move from special register
mr
mr r4, r19
7e649b78
mulli
mulli r0, r14, 168
mflr
mflr r0
Move to r31 the value in 3.
or
or r0, r5, r0
7ca00378
ori
ori r20, r20, 0x0004
62940004
psq_l
psq_l p31, 0x0068(r1), 0, qr0
psq_st
psq_st p31, 0x01B8(r1), 0, qr0
f3e101b8
rlwinm
rlwinm r0, r0, 2, 0, 29 (3fffffff)
stfd
stfd f31, 0x01B0 (sp)
dbe101b0
stfs
stfs f0, 0x0030 (r31)
d01f0030
sth
sth r0, -0x8000 (r30)
stmw
stmw r14, 0x00B8 (sp)
Stw
stw r0, 0x0104 (sp)
stwu
stwu sp, -0x01C0 (sp)
Store Word And Update
sub
sub r3, r16, r15
subi
subi r0, r3, 1